Received: from bikeshed.isc.org (bikeshed.isc.org [IPv6:2001:4f8:3:d::19]) by bugs.isc.org (Postfix) with ESMTP id 59D3D71B583 for ; Thu, 10 Sep 2015 17:40:02 +0000 (UTC) Received: by bikeshed.isc.org (Postfix, from userid 10292) id 52698216C59; Thu, 10 Sep 2015 17:40:02 +0000 (UTC) From each@isc.org Thu Sep 10 17:40:02 2015 Delivered-To: bind-suggest@bugs.isc.org User-Agent: Mutt/1.5.23 (2014-03-12) MIME-Version: 1.0 Subject: [edmonds@mycre.ws: ISO C11's stdatomic.h] Return-Path: X-Original-To: bind-suggest@bugs.isc.org Content-Disposition: inline Date: Thu, 10 Sep 2015 17:40:02 +0000 content-type: text/plain; charset="utf-8" Message-ID: <20150910174002.GA72192@isc.org> To: bind-suggest@isc.org From: "Evan Hunt" X-RT-Original-Encoding: ascii X-RT-Interface: Email Content-Length: 2357 ----- Forwarded message from Robert Edmonds ----- Date: Mon, 7 Sep 2015 21:25:07 -0400 From: Robert Edmonds To: bind-workers@lists.isc.org Subject: ISO C11's stdatomic.h Hi, Standard C now supports architecture-independent atomic operations via the stdatomic.h header, no inline assembly required. This is supported by gcc >= 4.9: ISO C11 atomics (the _Atomic type specifier and qualifier and the header) are now supported. (https://gcc.gnu.org/gcc-4.9/changes.html) and also by clang >= 3.6: Clang now provides an implementation of the standard C11 header . (http://llvm.org/releases/3.6.0/tools/clang/docs/ReleaseNotes.html) If I understand correctly, the isc_atomic_* functions could be implemented in terms of the atomic_* functions as: #include static inline isc_int32_t isc_atomic_xadd(isc_int32_t *p, int val) { return atomic_fetch_add(p, val); } static inline isc_int64_t isc_atomic_xaddq(isc_int64_t *p, isc_int64_t val) { return atomic_fetch_add(p, val); } static inline void isc_atomic_store(isc_int32_t *p, isc_int32_t val) { atomic_store(p, val); } static inline isc_int32_t isc_atomic_cmpxchg(isc_int32_t *p, int cmpval, int val) { atomic_compare_exchange_strong(p, &cmpval, val); return cmpval; } (This was originally suggested by James Cowgill on the debian-mips mailing list.) There are a number of CPU architectures that are capable of atomic operations that are not supported by the existing lib/isc/*/include/isc/atomic.h implementation (e.g., arm*, ppc64el, s390x). It would be nice to support these architectures, as well as future architectures, preferably without anyone having to write any more assembly code. Bugs in atomic implementations tend to be critical, see e.g. ISC-Bugs #19227, #23469, #25181. It would be nice to avoid these kinds of bugs by relying on intrinsics provided by the compiler where possible. -- Robert Edmonds _______________________________________________ bind-workers mailing list bind-workers@lists.isc.org https://lists.isc.org/mailman/listinfo/bind-workers ----- End forwarded message -----